The accuracy of the PIT timer depends on the quality of the oscillator used, and is typically accurate to within +/- 1.73 seconds per day. The PIT channel 2 gate is controlled by IO port 0圆1, bit 0. For PIT channels 0 and 1, the associated gate input pin is not connected to anything.
In this way, each channel can be used in one of several "modes" – for example, as a frequency divider (where the count is automatically reset) or as a "one shot" timer (where the count isn't automatically reset).Įach PIT channel also has a "gate input" pin which can be used to control whether the input signal (the 1.19MHz one) gets to the channel or not.
#Simple divider with remainder software#
Software also specifies an action to be taken when the counter reaches zero on each individual channel.
The PIT chip has three separate frequency dividers (or 3 separate channels) that are programmable, in that the value of the "reset counter" is set by software (the OS). Since the frequency can't be divided by 0 in a sane way, many implementations use 0 to represent the value 65536 (or 10000 when programmed in BCD mode). The PIT has only 16 bits that are used as frequency divider, which can represent the values from 0 to 65535. For example, if the input signal is 200 Hz and the counter is reset to a value of ten each time, then the output frequency would be 200/10, or 20 Hz. Each "pulse" from the input frequency causes the counter to be decreased, and when that counter has reached zero a pulse is generated on the output and the counter is reset. This is typically done by using a counter. The basic principle of a frequency divider is to divide one frequency to obtain a slower frequency. In modern computers, where the cost of electronics is much less, and the CPU and video run at much higher frequencies the PIT lives on as a reminder of "the good ole' days". At the time it was a brilliant method of reducing costs, as the 14.31818 MHz oscillator was cheap due to mass production and it was cheaper to derive the other frequencies from this than to have several oscillators. This frequency is 1.1931816666 MHz (where the 6666 part is recurring). By logically ANDing these signals together a frequency equivalent to the base frequency divided by 12 was created. This base frequency was divided by 3 to give a frequency of 4.77272666 MHz that was used by the CPU, and divided by 4 to give a frequency of 3.579545 MHz that was used by the CGA video controller.
#Simple divider with remainder Pc#
The original PC used a single "base oscillator" to generate a frequency of 14.31818 MHz because this frequency was commonly used in television circuitry at the time. The reason for this requires a trip back into history (to the later half of the 1970's). The oscillator used by the PIT chip runs at (roughly) 1.193182 MHz. 12.2 Using the IRQ for Preemptive Multitasking.6.2 Mode 1 – Hardware Re-triggerable One-shot.6.1 Mode 0 – Interrupt On Terminal Count.
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